| Home Seminars John Shen (May. 20, 2004) |
Abstract
Microarchitecture research in academia mostly consists of making some changes
to the CPU simulation model, running some SPEC benchmarks through the model,
getting "speedups" in the double digits, and then publishing the results
in a paper. This has become the standard practice for many PhD students doing
research in microarchitecture. This talk highlights a current research project
in Intel's Microarchitecture Research Lab on "Virtual Multithreading"
that goes beyond this standard practice.
Virtual Multithreading involves the concept of using multithreading techniques
and machine resources, to speedup the latency of single-threaded applications.
Instead of parallelizing the original program, small number of light-weight
helper threads are generated and attached to the original code. The helper threads
are judiciously invoked at run time to perform timely data prefetching for the
original program. In addition to SPEC2K benchmarks, database workloads are used.
Instead of CPU simulators, physical multiprocessor systems are used in the experimentation.
New insights are gained and new lessons are learned in this research project.
Biography
John Paul Shen is the Director of Intel's Microarchitecture Research Lab (MRL),
which has about two-dozen researchers located in Santa Clara, CA, Hillsboro,
OR, and Austin, TX. MRL is responsible for developing innovative microarchitecture
techniques that can be used in future Intel microprocessor products. MRL researchers
collaborate closely with product teams in joint advanced-development efforts.
MRL frequently hosts visiting faculty and PhD interns, and conducts joint research
projects with academic research groups.
Prior to joining Intel in 2000, John Shen was a Professor in the Electrical
and Computer Engineering Department of Carnegie Mellon University, where he
headed up the CMU Microarchitecture Research Team (CMuART). He has supervised
a total of 16 PhD students during his years at CMU. Seven are currently with
Intel, and five have faculty positions in academia. He won multiple teaching
awards at CMU, and has just completed the book "Modern Processor Design:
Fundamentals of Superscalar Processors" which will be published by McGraw-Hill
in summer 2004.
Reception
A reception with refreshments will take place at 3:00 PM on the 2nd floor of the engineering building.| Last updated: Thu May 20 22:01:43 PDT 2004 |