Coen 1

Fall 2000

 

Homework 3 Due: Monday, November 6

  1. What is the advantage of having a family of physically different CPUs that all execute the same instructions?
  2. Explain why the performance improvement possible through pipelining is proportional to the number of stages in the pipeline.
  3. What characteristics about a program (the instructions the CPU is executing) can reduce the performance of a superscalar CPU?
  4. What performance problem is a channel addressing?
  5. Explain the difference between full associative and direct mapped cache mapping approaches.
  6. Explain the components of disk access time.