Coen 1
Fall 2000
Homework 3 Due: Monday, November 6
- What is the advantage of having a family of physically different CPUs that all execute the same instructions?
- Explain why the performance improvement possible through pipelining is proportional to the number of stages in the pipeline.
- What characteristics about a program (the instructions the CPU is executing) can reduce the performance of a superscalar CPU?
- What performance problem is a channel addressing?
- Explain the difference between full associative and direct mapped cache mapping approaches.
- Explain the components of disk access time.