Give and explain the general criteria by which storage / memory is evaluated.
Explain the difference between the two major measurements for speed, namely (1)access time for a random access
and the burst data rate. Give examples where one or the other is the more important measurement.
Explain the purpose of caching.
Explain "write-back" and "copy-through" and lists advantages and disadvantages of both schemes.
Give and explain the design of a 6T SRAM cell.
Give the design of a single 1T1C DRAM cell and explain the operations of read, write, and refresh.
Explain why it is necessary to have a reference bit line in modern DRAM layouts.
Using DRAM memory as an example, explain pipelining.
List and explain briefly the major methods to increase the data rate of a DRAM.
Explain DRAM page mode.
We are designing a SRAM cache that contains 1 MB of data. Our first design uses 2 word blocks and is two-way set
associative. It uses copy-through and implements LRU cache replacement policy (within a cache line).
Sketch the design of a single cache line, calculate the number of cache lines,
and calculate the overhead.
Our second design uses 4 word blocks and write-back. Sketch the design of a single cache line, calculate the
number of cache lines, and calculate the overhead.
In addition, all homework questions are templates of midterm questions.